PRACTICAL SERVO SYSTEM
Fig. 15.5 shows a digital servo arrangement for a dual-speed VHS homedeck videorecorder. The basic reference for capstan speed is the crystal-generated fsc clock entering at pin 35. It is compared with FG feedback (via pin 31) to produce a control voltage at IC pin 20. During playback capstan phasing is governed by control-track pulses off-tape, with user and autotracking control effected via the I2C bus at IC pins 44 and 45. In record mode the CTL head is fed with pulses at 40 ms intervals via IC pins 22, 23 and the CTL divider within the chip; the duty-cycle of the pulses is briefly changed from 60:40 (normal) to about 30:70 at the beginning of each new recording to form an index mark for programme location.
During record mode the starting point for the control track signal and the drum (here called cylinder, CYL) phase control is the sync pulse entering the IC on pin 42. In conjunction with the PG (TACHO) pulse entering on pin 55 and the FG tone coming in on pin 1, it produces a speed/phase control voltage at IC pin 4 for application to the motor control chip IC01. The servo chip produces at its pin 38 an SW25 squarewave for monitoring within the system- control section and for use in the head-amplifier and colour-under sections of the signal circuits, together with a VP (Vertical Pulse) to take the place of the corrupt field sync pulse during still-frame and ‘trick-play’ modes. All functions of the IC, including headswitch timing, are governed by the I2C serial control bus linked via IC pins 44 and 45.
In many VCR designs the servo system is incorporated in the system-control chip: an example is given in Fig. 16.3 on page 330.