MULTIFUNCTION PROCESSING CHIPS
As receiver technology has advanced the decoder IC arrangement illustrated in Fig. 7.6 (itself developed from 4-, 3- and 2-chip systems of earlier years) has been superseded by more highly integrated chips which incorporate the entire colour decoder, along with all the other low-power analogue processing sections of the receiver – Fig. 7.7 gives an example, where it can be seen that the i.f. output from the tuner and SAW filter enters at the left and RGB video waveforms emerge at the right. Along the way are carried out sync separation and time- base generation, f.m. sound demodulation and processing, and multi- standard chroma decoding.
The section which interests us here is in the bottom right-hand side of the diagram, where lies the dual-standard PAL/NTSC decoder with auto-recognition of the system in use; the 4.4 MHz crystal at pin 35 is for use with PAL, and the 3.6 MHz one at pin 34 for NTSC. The LC components connected to pin 36 form the loop filter for the burst phase detector, and correspond to the network at pins 24/25 of the IC in Fig. 7.6. All the user control functions (i.e. saturation) enter this IC via the I2C port at chip pins 7 and 8 in the form of serial data from the microcontroller IC – more details in Chapter 22.
The TDA4665 device connected between pins 29/30 and 31/32 in Fig. 7.7 is a 64 μs delay line using a ‘bucket-brigade’ (CCD) technique. Inside it are two sets of 192 capacitors in a progressive ladder arrange- ment, each capacitive rung connected to the next by an electronic switch. The switches are closed in sequence over a 64 μs period by an in-built clock oscillator at 3 MHz rate, line-locked by a sandcastle pulse. B−Y and R−Y signals are fed onto the ladder and ‘chopped’ into samples by the action of the first switch, then stepped sequentially along their own capacitor-ladders, re-entering the main IC after a one-line delay. Thus the function of the glass delay line described earlier is achieved by cheap electronics rather than costly mechanical/ acoustic means. Wideband ‘short’ delays for luminance signals can also be realised using this technique and incorporated in multifunction processing ICs if required.
After the primary-colour matrix the RGB signals in the main chip pass to switches, controlled by the I2C bus, to permit the injection of RGB signals from (e.g.) a text decoder or a digital TV receiver box. Thereafter the RGB feeds, whatever their source, are controlled for brightness and contrast by the user (via the control bus) and the beam-limiter circuit; and individually for black-level point by a chip- internal process similar to that already described for automatic grey- scale tracking in the chip shown in Fig. 7.6.