MAPPING AN ALGORITHM ONTO A PARALLEL ARCHITECTURE The process of mapping an algorithm onto a parallel architecture begins with a dependency analysis in which data dependencies among the operations in a program are identified. Consider the C code shown in Figure 10-23. In an ordinary SISD processor, the four numbered statements require four time steps […]
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Posts by Farahat
Trends in computer architecture: parallel architecture (the Flynn taxonomy and interconnection networks).
Parallel Architecture One method of improving the performance of a processor is to decrease the time needed to execute instructions. This will work up to a limit of about 400 MHz (Stone, 1991), at which point an effect known as ringing on busses prohibits further speedup with conventional bus technology. This is not to say […]
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Trends in computer architecture: vliw machines and case study: the anthelia- 64 (Merced) architecture (background—the 80×86 cisc architecture and the Merced: an epic architecture).
10.7 VLIW Machines There is an architecture that is in a sense competitive with superscalar architectures, referred to as the VLIW (Very Long Instruction Word) architecture. In VLIW machines, multiple operations are packed into a single instruction word that may be 128 or more bits wide. The VLIW machine has multiple execution units, similar to […]
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Trends in computer architecture: multiple instruction issue (supers alar) machines – the power pc 601 and case study: the power pc™ 601 as a superscalar architecture (instruction set architecture of the power pc 601 and hardware architecture of the power pc 601).
10.4 Multiple Instruction Issue (Supers alar) Machines – The PowerPC 601 In the earlier pipelining discussion, we see how several instructions can be in various phases of execution at once. Here, we look at superscalar architecture, where, with separate execution units, several instructions can be executed simul- taneously. In a superscalar architecture, there might be […]
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Trends in computer architecture: overlapping register windows
Overlapping Register Windows One modern architectural feature that has not been as widely adopted as other features (such as pipelining) is overlapping register windows, which to date has only been adopted by the SPARC family. This feature is based upon studies that show typical programs spend much of their time dealing with procedure call-and-return overhead, […]
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Trends in computer architecture: pipelining the data path (arithmetic, branch, and load-store instructions, pipelining instructions and keeping the pipeline filled).
10.2 Pipelining the Data path The flow of instructions through a pipeline follows the steps normally taken when an instruction is executed. In the discussion below we consider how three classes of instructions: arithmetic, branch, and load-store, are executed, and then we relate this to how the instructions are pipelined. 10.3.1 ARITHMETIC, BRANCH, AND LOAD-STORE […]
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TRENDS IN COMPUTER ARCHITECTURE: From CISC to RISC
10.1 From CISC to RISC Historically, when memory cycle times were very long and when memory prices were high, fewer, complicated instructions held an advantage over more, simpler instructions. There came a point, however, when memory became inexpensive enough and memory hierarchies became fast and large enough, that computer architects began reexamining this advantage. One […]
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Trends in computer architecture: quantitative analyses of program execution(quantitative performance analysis).
TRENDS IN COMPUTER ARCHITECTURE In the earlier chapters, the fetch-execute cycle is described in the form: “fetch an instruction, execute that instruction, fetch the next instruction, etc.” This gives the impression of a straight-line linear progression of program execution. In fact, the processor architectures of today have many advanced features that go beyond this simple […]
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SUMMARY OF COMMUNICATION
■ SUMMARY Communication involves the transfer of information between systems. As a rule, data is transferred in bit-serial fashion because the time-of-flight delays dominate the transfer time for high speed networks. However, modulation schemes allow many bits to be encoded in a single sample, such as for a dibit. The choice of modulation scheme impacts […]
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Communication : case study: asynchronous transfer mode (synchronous vs. Asynchronous transfer mode, what is atm?, atm network architecture and outlook on atm).
9.4 Case Study: Asynchronous Transfer Mode Historically, there have been different networks that carry different types of information: • Telex (old style teletypewriters, used for news feeds, stock quotes, etc.) • “Plain old telephone service” (POTS) via the public switched telephone network (PSTN); • Data, via the packet switched data network (PSDN); • Television via: […]
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