Square D Company ®Norpak Control System part3

13·3 NORPAK LOGIC ELEMENTS

NORPAK circuitry consists of combinations of resistors, transis­ tors, diodes, or capacitors, and hence is inherently static and suitable for encapsulation. Encapsulation is accomplished by packaging the circuitry in molded bakelite cases which are then filled with an epoxy resin. The resulting package is a solid unit which will resist mechanical or thermal shocks and is inert to almost any industrial atmosphere. Mounting holes are provided in each corner. The package may be mounted in any plane at any surface.

The logic elements are packaged in either a size I or a size II bakelite case. A third bakelite case is used to package acces­ sory items such as signal converters and output amplifiers. The

Fig. 13·23NOR  circuit with terminals shown. (SquareD Co.)

size I case has space for seven nylon wafers lettered from A to G, and the size II case has space for 21 wafers lettered from A to Y. Each wafer has 10 taper-pin terminals, each numbered from 1 to 10. The terminals are paired together in single electric connections as 1-2, 3-4, 5-6, 7-8 and 9-10, resulting in five separate electric connections. This provision of paired terminals permits each electric connection to become a junction point.

The NOR circuit consists of a transistor and five resistors as shown in Fig. 13·23. Three standard inputs are connected to terminals 1-2, 3-4, and 5-6. A special input direct to the base of the transistor is provided at terminal 7-8. This special input connection is to be used only where instructions so state. The output signal from the collector of the transistor is connected to terminal 9-10. Thus, all the connections for a given NOR are made to the same wafer, and each wafer represents a separate NOR element. The power-supply connections -20 volts d-e, common, and +20 volts d-e are connected internally to a bus bar which is brought out on the A wafer. If there are some unused NORS in a Pak, the -20-volt collector voltage and the +20-volt bias voltage will create a collector-to-base voltage of 40 volts, which might possibly damage the transistor. This possibility can be eliminated by connecting any input terminal (1-2, 3-4, or 5-6) to common, thus reducing the junction voltage to within safe limits.

The amount of power required at the input of a NOR to cause the NOR to switch is defined as one unit of logic load. Each standard NOR is capable of powering four other NORs and there­ fore has an output rating of four units of logic load. All NORPAK elements are rated in these units of logic load.

The type L 1 (Fig. 13·24) consists of six standard NORS as described above. The Pak is a size I package. The A wafer is red, indicating the power-supply connection of +20 volts at terminall-2, common at terminal 5-6, and -20 volts at terminal 9-10. The remaining six wafers each represent a NOR element. Each wafer is lettered, and its color is white to indicate a stan­ dard NOR.

The type L2 consists of 20 standard NORS packaged in a size II package. All connections and ratings are identical to those of the L1 types. Since these are standard NORS, the wafers are all white. This is a more economical unit when 10 or more standard NORs are required.

The type L6 power NOR Pak consists of six power NORS in a size I Pak. The power NOR can supply 10 units of logic load as opposed to the four-unit rating of the standard NOR. The power NOR is used in controlling large-unit load circuits or output amplifiers. The power NOR circuit is identical to the standard NOR circuit except that component values are changed and the input and output connections are the same. The power NORs have blue wafers.The type L9 universal NOR consists of five universal NORs in a size I Pak. It is designed for high logic-load requirements or to be operated as a small output amplifier to control lights

Fig. 13·24The NOR  Paks. (a) L9. (b) L2. (c) L3. (d) Ll. (Square

or relays. The G wafer provides the termination of five separate 1.5-kilohm resistors whose opposite ends are connected to the -20-volt d-e bus. This wafer is black, and the universal NOR wafers are blue. The universal NOR circuit is the same as a stan­ dard NOR circuit except that component values are changed. In the case of the universal NOR, the collector resistor can be selected to determine the maximum output from 10 to 50 units of load (Fig. 13·25). The required resistance may be selected from the five 1.5-kilohm resistors of wafer G, or a separate resistor of the proper size may be connected between the -20- volt d-e bus and the universal NOR output terminal 9-10. The collector current is also a function of the base current in a transistor, and therefore it is also necessary to increase the input power as the output capacity is increased of the universal NOR.

Fig.  13·25 Universal NOR  circuit. (SquareD Co.)

The universal NOR input terminals 1-2 and 3-4 require one unit of load input each, but 5-6 requires two units of load input. By connecting the various terminals together, one can obtain any combination of load input from one to four units. The input terminal 7-8 has a special direct base input to be used only where instructions so state.

The type L3 OR Pak (Fig. 13·26a) consists of seven separate yellow wafers in a size I Pak. No red bus module is present , since there is no power supply required for the OR element.

Each wafer contains a one-input OR and a two-input OR . Each OR is capable of handling 50 units of logic load.

The purpose of the OR function is to provide isolation between two or more signals connected to a common point. This is ac­ complished by using silicon rectifiers in each input leg. Thus a signal can flow in only one direction in an OR circuit. Because

Fig. 13 ·26 Diode OR  circuit. (Square D Co.)

of this, the OR cannot be used to control logic elements that require a discharge path such as the types L8, Lll, or L12. Multiple-input OR circuits can be connected as shown in Fig. 13·26b. One type L3 could supply a 21-input OR if desired . Because relatively few ORs are needed in comparison to the num­ ber of NORs, usually it is advantageous to centrally locate the OR Pak among the other logic elements.

If only a few OR functions are required in a system, it may be more economical to consider using two NORs in series to provide the OR functions. Occasionally, it may be desirable to use an OR diode as a discharge path for a d-e relay coil. An example of this is the case of a universal NOR being used as an amplifier to operate a relay coil. In such a discharge circuit, the diode is capable of handling a peak current of 300 rna.

A retentive MEMORY may be used whenever it is mandatory ,in the event of power failure, that the MEMORY retain its last energized condition upon resumption of power. Thus it performs the same function that a mechanically held relay does in therelay circuit. An alternate method of providing this function is to use standard logic components and provide an emergency battery-operated power supply. The choice is based upon the eco­ nomics of the application. When only a few functions require a retentive MEMORY feature, the type L5 retentive MEMORY is best. If a great number of retentive MEMORYs are required, it is advisable to consider the emergency power supply. One reten­ tive MEMORY is packaged in a size I case (Fig. 13·27). The logic wafer G is green in color, and the bus wafer A is red. The retentive MEMORY requires one unit of logic load on either input and will provide three units of logic-load output.

Fig.   13·27 Retentive MEMORY,

The retentive MEMORY consists of a MEMORY controlled by a saturable core (Fig. 13·28). The saturable core provides the memory feature by gating or directing a pulse signal to the ON or the OFF portion of the standard NOR MEMORY, depending on the state of the core. The state of the core, saturated or unsaturated, is set by the last input signal prior to the power failure. The required pulse signal is obtained from the power supply and applied to the power wafer A at terminal 3-4. The pulse signal is 6 volts a-c. A discharge path is needed; therefore the retentive MEMORY cannot be driven directly by an OR logic element. The saturable core material will maintain its properties for an unlimited number of years; hence it is an ideal MEMORY element. Thus there is no practical time limit to the retentive feature of the L5 retentive MEMORY. If the input signal is switched, the output signal will switch within 0.005 sec, but the input signal must remain present for at least 0.04 sec to completely switch the saturable core. Thus if a signal is present for less than 0.04 sec, the magnetic core will not retain the MEMORY. If the input device is a contact with bounce, the reten- · tive MEMORY output will provide a pulsating output signal after each bounce. If this is undesirable, use bounceless input circuits. If inputs are simultaneously present at both inputs ( 1-2 and 3-4), the output will become 0 at 7-8 and 1 at 9-10. When the normal circuit configuration is used, this action is known as an OFF override. ON override can be accomplished by desig­ nating terminals 1-2 as OFF input and 3-4 as ON input; this results in 7-8 becoming the OFF output and 9-10 becoming the ON output.

Fig. 13·28 Retentive MEMORY circuit. (SquareD Co.)

The L18 timer (Fig. 13·29) incorporates one complete time-delay-af ter-energizing function in a single size I Pak. The logic wafer B is gray and the bus wafer A is red. One unit of logic load is required at the input, and the output will provide three units of logic load. The time delay consists of a MEMORY, a timing network, and two NORS (Fig. 13·30).

Fig. 13·29Time DELAY.  (SquareD Co.)Fig. 13·30Time DELAY  circuit.  (SquareD  Co.)

The time-delay function is provided by an RC timing network and a zener diode. A logic 1 ( -20 volts) signal at the input causes the blocking signal to the MEMORY from NOR 1 to go to 0 and the output of NOR 2 to go to 1 ( -20 volts d-e) .

This voltage charges capacitor 1C through the time-adjust rheo­ stat. The charging voltage on 1C continues to rise to the break­ down voltage of the zener diode; at this value the MEMORY turns on, providing a signal at the output. The timing period depends upon the setting of the time-adjust rheostat.

Since the timing network employs an RC time delay, the delay is subject to changes of supply voltage (-20 volts) and the ambient temperature. These parameters will vary from system to system but should be relatively constant for any one system. Thus, the time-delay adjustment pot cannot be calibrated until the timer is being used with a particular system.

Standard pilot devices, such as limit switches, push buttons, selector switches, etc., are usually used as a source of input signals to the static system. To assure the reliability of these contact-making devices, they should be used at voltages higher than the 10- to 20-volt signals that are found within the NOR circuitry. The higher voltages are, of course, easily obtained, but then the problem is to convert them to a usable level for the logic portion of the system.

The most commonly used signal converter is the type N5 (Fig. 13·31a), which is a four-input device that uses the 130- volt d-e output from the type P 1 logic power supply as its pilot operating source voltage. Each N5 input then reduces the 130 volts to about 20 volts at its output by means of a voltage-divider circuit. As an added feature, the presence of a signal at each input of the converter is indicated by a built-in neon lamp. These are the type NE84 and are easily replaced. Each N5 output will carry five units of logic load while the -130-volt source will drive 20 N5 inputs at the same time. This is equiva­ lent to one unit of -130-volt power per conducting input. The N5 has a built-in capacitor buffering against induced tran­ sient signals. Also, it is designed to tolerate a pilot-circuit leak­ age resistance as low as 40,000 ohms. It is recommended that the type N5 converter be used whenever the pilot input devices are remotely mounted.

Frequently an application requires the pilot devices to be operated on 120 volts a-c. The type N2 signal converter (Fig. 13·31b) is a two-input device that converts 110 volts a-c to a -20-volt d-e logic signal. Each input circuit consists of a small120/ 24 volt transformer with a rectified and filtered second­ ary output that can drive five units of logic load. Each of the inputs incorporates a neon light to indicate the presence of an input signal. The filtered secondary output gives the converter an inherent buffer action against induced transient pickup. Its input impedance is 50,000 ohms, however, which would make it sensitive to a severe current-leakage condition. To combat this, a dummy load resistor may be placed across the input ter­ minals. For example, a 3,000-ohm 10-watt resistor across input terminals 1 and L2 would allow for a leakage resistance of 10,000 ohms across the pilot device.

Fig . 13 ·31Signal converters. (SquareD Co.)

 

A second type of a-c-to-d-e signal converter is the type N3, which is designed to accept a 110-volt a-c half-wave rectified input and convert it into a d-e voltage of about 25 volts. The output is filtered, but its minimum instantaneous voltage drops to 10 volts with one unit of logic load, which is its rated output capacity. The converter is designed to operate across the plate circuit of a thyratron tube, but could be operated from any half-wave rectified source. The filtered output makes this con­ verter rather insensitive to induced interference.

The type N4 signal converter has been specifically designed to operate with the class 9007 type V9, series A or V10, and series B transducers to provide a completely solid-state amplify­ ing and converting circuit with an output suitable to switch a · NOR. One N4 is required for each transducer. It has an output capacity of one unit of logic load and requires eight units of -20-volt power, % unit of +20-volt power, and % unit of pulse power. (The pulse output of the type P 1 power supply is rated at 20 units.) The OFF input requires 3 units. The OFF output capacity of the type PI power supply is 20 units.

Whenever a contact-making pilot device is used as an input signal to a transfer element that is part of a counting circuit, shift register, information storage system, or the like, there is

danger of contact bounce giving false input signals. The speed of response of these circuits makes it quite easy to follow the bounce action and thus give two or more input pulses when only one was intended. Circuits of Fig. 13·32 show how the

Fig .  13 ·32 Input  circuits  used  to  eliminate  effect  of   contact  bounce.

bounce effect may be eliminated when using d-e or a-c signal converters for single-throw or double-throw contacts. Slowly opening or closing contacts should not be used. Snap-action switches are preferred.

The type F 1 filter Pak consists of 12 identical resistor-capaci­ tor networks encapsulated in a size I Pak. Two filter networks terminate at each of the six black wafers as shown in Fig. 13·33. A red power wafer is used to make a common connection at terminal A 5-6. No other power connections are necessary.

A filter circuit is designed to provide a buffer against induced or unwanted input signals that could enter the logic circuit through wires coming from points outside the NORPAK panel. Normally, a signal converter serves this function, but if the input signals are already at a NORPAK logic level (-20 volts d-e) the converter is not required; however, protection from stray pickup signals must still be maintained. Logic-level signals could

Fig. 13 ·33Type Fl filter-Pak  circuit. ( SquareD Co.)

originate from another NORPAK panel, a computer, an electri­ cal instrument, or from contact-making devices that are used at low voltages. A separate filter input should be used for each wire entering the logic panel. A logic-level signal leaving a NORPAK control should always be isolated by a separate NOR · having no other connections to its output.

The diode included in each of the filter networks has a 5-volt forward drop and a low current capacity. The high forward drop aids in the transient signal protection but increases the delay time of the incoming signal. The 5-volt forward drop thus requires that the NORPAK devices energizing these inputs be derated by 50 percent. The diode may be bypassed , however , in six of the twelve filters by using the special output terminal at 3-4 in place of 5-6. No derating is then necessary. In all cases, the device supplying the input signal must be capable of carrying the output load, since no amplification of the signal is taking place.

The signal delay caused by the filter network is a maximum of 230 J.LSec when the diode is included. If the diode is bypassed, the delay will be a maximum of 150 J.LSec. The output load rating is three units when the diode is being used with standard NORPAK inputs. Negative input potentials as high as 80 volts can be used as input signals to the filter circuit as long as the current is held to a maximum of 3.75 rna. For example, a -60-volt d-e signal would require at least 15,000 ohms in the circuit ( 5 volts is subtracted from 60 to allow for the forward drop of the diode). Since the input impedance to a standard NOR is 15,000 ohms, the current would be held to a safe limit, but only one unit of load could then be connected to the output of the filter.

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