10.5 Functional Categories Of 68000 Addressing Modes
All of the 68000 addressing modes in Table 10.2 can be further divided into four functional categories as shown in Table 10.3.
• Data Addressing Mode. An addressing mode is said to be a data addressing mode if it references data objects. For example, all 68000 addressing modes except the address register direct mode fall into this category.
• Memory Addressing Mode. An addressing mode capable of accessing a data item stored in memory is classified as a memory addressing mode. For example, the data and address register direct addressing modes cannot satisfy this definition.
• Control Addressing Mode. This refers to an addressing mode that has the ability to access a data item stored in memory without the need to specify its size. For example, all 68000 addressing modes except the following are classified as control addressing
modes: data register direct, address register direct, address register indirect with postincrement, address register indirect with predecrement, and immediate.
• Alterable Addressing Mode. If the effective address of an addressing mode is written into, then that mode is an alterable addressing mode. For example, the immediate and the program counter relative addressing modes will not satisfy this definition.
10.6 68000 Instruction Set
The 68000 instruction set contains 56 basic instructions. Table 10.4 lists some of the instructions affecting the condition codes. Appendices D and G provide the 68000 instruction execution times and the instruction set (alphabetical order), respectively.
The 68000 instructions can be classified into eight groups as follows:
• (EA) in LEA (EA), An can use all addressing modes except Dn, An, (An)+,- (An), and immediate.
• Destination (EA) in MOVE (EA), (EA) can use all modes except An, relative, and immediate.
• Source (EA) in MOVE (EA), (EA) can use all modes .
• Destination (EA) in MOVEM reg list, (EA) can use all modes except, An, (An)+, relative, and immediate.
• Source (EA) in MOVEM (EA), reg list can use all modes except Dn, An,- (An), and immediate.
• (EA) in PEA (EA) can use all modes except, An, (An)+, -(An), and immediate .
1. Data movement instructions
2. Arithmetic instructions
3. Logical instructions
4. Shift and rotate instructions
5. Bit manipulation instructions
6. Binary-coded decimal instructions
7. Program control instructions
8. System control instructions
10.6.1 Data Movement Instructions
These instructions allow data transfers from register to register, register to memory, memory to register, and memory to memory. In addition, there are also special data movement instructions such as MOVEM (move multiple registers). Typically, byte, word, or long word data can be transferred. A list of the 68000 data movement instructions is given in Table
10.5. Let us now explain the data movement instructions.
MOVE Instructions
The format for the basic MOVE instruction is MOVE. S (EA), (EA), where S = L, W, or B. (EA) can be a register or memory location, depending on the addressing mode used. Consider MOVE. B 03, 01, which uses the data register direct mode for both the source and destination. If [D3.B] = 0516 and [D l.B] = 01 16, then, after execution of this MOVE instruction, [Dl.B] = 0516 and [D3.B] = 0516•
There are several variations of the MOVE instruction. For example MOVE. W CCR, (EA) moves the contents of the low-order byte of SR (i.e., CCR) to the low-order byte of the destination operand; the upper byte of SR is considered to be zero. The source operand is a word. Similarly, MOVE. W (EA), CCR moves an 8-bit immediate number, or low-order 8-bit data, from a memory location or register into the condition code register; the upper byte is ignored. The source operand is a word. Data can also be transferred between (EA) and SR r USP (A7) using the following privileged instructions:
MOVEA. W or. L (EA), An can be used to load an address into an address register. Word-size source operands are sign-extended to 32 bits. Note that (EA) is obtained by using an addressing mode. As an example, MOVEA. W # $ 2 0 0 0, AS moves the 16-bit word 2000 16 into the low 16 bits of AS and then sign-extends 2000 16 to the 32-bit number 00002000 16• Note that sign extension means extending bit 15 of 2000 16 from bit 16 through bit 31. As mentioned before, sign extension is required when an arithmetic operation between two signed binary numbers of different sizes is performed. The (EA) in MOVEA can use all addressing modes.
The MOVEM instruction can be used to push or pop multiple registers to or from the stack. For example, MOVEM.L 00-07 /AO-A6,- (SP) saves the contents of all eight data registers and seven address registers in the stack. This instruction stores address registers in the order A6-AO first, followed by data registers in the order D7-DO, regardless of the order in the register list. MOVEM .L ( sP) +, DO-D7 I A 0-A 6 restores the contents of the registers in the order D0-D7, A0-A6, regardless of the order in the register list.
The MOVEM instruction can also be used to save a set of registers in memory. In addition to the preceding predecrement and postincrement modes for the effective address, the MOVEM instruction allows all the control modes. If the effective address is in one of the control modes, such as absolute short, then the registers are transferred starting at the specified address and up through higher addresses. The order of transfer is from DO to D7 and then from AO to A6. For example, MOVEM. W A5/0l/03/Al-A3, $2000 transfers the low 16-bit contents of Dl, D3, AI, A2, A3, and A5 to locations $2000, $2002, $2004, $2006, $2008, and $200A, respectively.
The MOVEQ. L # $d8, Dn instruction moves the immediate 8-bit data into the low byte of Dn. The 8-bit data is then sign-extended to 32 bits. This is a one-word instruction. For example, MOVEQ. L # $8 F, 05 moves $FFFFFF8F into D5.
To transfer data between the 68000 data registers and 6800 (8-bit) peripherals, the MOVEP instruction can be used. This instruction transfers 2 or 4 bytes of data between a data register and alternate byte locations in memory, starting at the location specified and incrementing by 2. Register indirect with displacement is the only addressing mode used with this instruction. If the address is even, all transfers are made on the high-order half of the data bus; if the address is odd, all transfers are made on the low-order half of the data bus. The high-order byte to/from the register is transferred first, and the low-order byte is transferred last. For example, consider MOVEP. L $0020 (A2), 01. If [A2] = $00002000, [00202016] = 02, [00202216] = 05, [00202416] = 01, and [00202616] = 04, then, after execution of this MOVEP instruction, Dl will contain 02050104 16•
EXG and SWAP Instructions
The EXG. L Rx, Ry instruction exchanges the 32-bit contents of Rx with that of Ry. The exchange is between two data registers, two address registers, or an address register and a data register. The EXG instruction exchanges only 32-bit-long words. The data size (L) does not have to be specified after the EXG instruction because this instruction has only one data size (L) and it is assumed that the default is this single data size. No flags are affected. The SWAP. W Dn instruction, on the other hand, exchanges the low 16 bits of Dn with the high 16 bits of Dn. All condition codes are affected.
LEA and PEA Instructions
The LEA. L (EA), An instruction moves an effective address (EA) into the specified address register. The (EA) can be calculated based on the addressing mode of the source. For example, LEA $0 0 2 56 0 2 2, A5 moves $002S6022 into AS. This instruction is equivalent to MOVEA. L # $0 02 5 6022, A5. Note that $002S6022 is contained in PC. It should be pointed out that the LEA instruction is very useful when address calculation is desired during program execution. The (EA) in LEA specifies the actual data to be loaded into An, whereas the (EA) in MOVEA specifies the address of actual data. For example, consider LEA $0 4 (A5, D2 .W) , A3. If [AS] = 00002000 16 and [D2] = 0028 16, then the LEA instruction moves 0000202C 16 into A3. On the other hand, MOVEA $04 (A5, 02. W) , A3 moves the contents of 00202C 16 into A3. Therefore, it is obvious that if address calculation is required, the instruction LEA is very useful.
The PEA.L (EA) computes an effective address and then pushes it on to the Supervisor stack (S=l) or User stack (S=O). This instruction can be used when the 16- bit address in absolute short mode is required to be pushed onto the stack. For example, consider PEA.L $9000 in the user mode. If [A7]=$00003006, then $9000 is sign-extended to 32 bits ($FFFF9000). The low-order 16 bits ($9000) are pushed at $003004, and the high order 16 bits ($FFFF) are pushed at $003002.
LINK and UNLK Instructions
Before calling a subroutine, the main program quite often transfers the values of certain parameters to the subroutine. It is convenient to save these variables onto the stack before calling the subroutine. These variables can then be read from the stack and used by the subroutine for computations. The 68000 LINK and UNLK instructions are used for this purpose. In addition, the 68000 LINK instruction allows one to reserve temporary storage for the local variables of a subroutine. This storage can be accessed as needed by the subroutine and can be released using UNLK before returning to the main program. The LINK instruction is usually used at the beginning of a subroutine to allocate stack space for storing local variables and parameters for nested subroutine calls. The UNLK instruction is usually used at the end of a subroutine before the RETURN instruction to release the local area and restore the stack pointer contents so that it points to the return address.
The LINK An, #- displacement instruction causes the current contents of the specified An to be pushed onto the system stack. The updated SP contents are then loaded into An. Finally, a sign-extended twos complement displacement value is added to the SP. No flags are affected. For example, consider LINK A5, #-$10 0. If [AS] = 00002100 16 and [USP] = 00004104 16,then after execution of the LINK instruction, the situation shown in Figure 10.4 occurs. This means that after the LINK instruction, [AS]= $00002100 is pushed onto the stack and the [updated USP] = $004100 is loaded into AS. USP is then loaded with $004000 and therefore 10016 locations are allocated to the subroutine at the beginning of which this particular LINK instruction can be used. Note that AS cannot be used in the subroutine.
The UNLK instruction at the end of this subroutine before the RETURN instruction releases the 10016 locations and restores the contents of AS and USP to those prior to using the LINK instruction. For example, UNLK A5 will load [AS] = $00004100 into USP and the two stack words $00002100 into AS. USP is then incremented by 4 to contain $00004104. Therefore, the contents of AS and USP prior to using the LINK instruction are restored.
In this example, after execution of the LINK, addresses $0003FF and below can be used as the system stack. One hundred (Hex) locations starting at $004000 and above can be reserved for storing the local variables of the subroutine. These variables can then be accessed with an address register such as AS as a base pointer using the address register indirect with displacement mode. MOVE. W d (A5) , Dl for read and MOVE. W Dl, d (A5) for write are typical examples.
The LINK instruction is used in this case to allocate 50 bytes for local variables. At the end of the subroutine, UNLK A2 is used before RTS to restore the original values of the registers and the stack. RTS returns program execution in the main program.
10.6.2 Arithmetic Instructions
These instructions allow:
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8-, 16-, or 32-bit additions and subtractions.
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16-bit by 16-bit multiplication (both signed and unsigned) and 32-bit by 16-bit division (both signed and unsigned)
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Compare, clear, and negate instructions.
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Extended arithmetic instruction for performing multiprecision arithmetic.
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Test (TST) instruction for comparing the operand with zero.
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Test and set (TAS) instruction, which can be used for synchronization in a multiprocessor system.
The 68000 arithmetic instructions are summarized in Table 10.6. Let us now explain the arithmetic instructions.
NOTE: If source (EA) in the ADDA or SUBA instruction is an address register, the operand length is WORD or LONG WORD.
(EA) in any instruction is calculated using the addressing mode used.
All instructions except ADDA and SUBA affect condition codes.
• Source (EA) in the above ADD, ADDA, SUB, and SUBA can use all modes. Destination (EA) in the above ADD and SUB instructions can use all modes except An. relative, and immediate.
• Destination (EA) in ADDI and SUBI can use all modes except An. relative, and immediate.
• Destination (EA) in ADDQ and SUBQ can use all modes except relative and immediate.
• (EA) in all multiplication and division instructions can use all modes except An.
• Source (EA) in CMP and CMPA instructions can use all modes.
• Destination (EA) in CMPI can use all modes except An, relative, and immediate.
• (EA) in CLR and NEG can use all modes except An, relative, and immediate.
• (EA) in NEGX can use all modes except An, relative and immediate.
• (EA) in TST can use all modes except An, relative, and immediate.
• (EA) in TAS can use all modes except An, relative, and immediate.
Addition and Subtraction Instructions
• Consider ADD. W $122 0 00, D0. If[122000 16] = 0012 16 and [DO]= 000216, then, after execution of this ADD, the low 16 bits of DO will contain 0014 16• C = 0 (No Carry), X = 0 (Same as C), V=O (No Overflow since previous Carry and the final Carry are the same), N = 0 (Most Significant Bit of the result is 0), Z = 0 (Nonzero result).
• The ADDI instruction can be used to add immediate data to a register or memory location. The immediate data follows the instruction word. For example, consider ADDI. W #$ 0 012, $1002 00. If [10020016] = 0002 16, then, after execution of this ADDI, memory location 10020016 will contain 001416•
• ADDQ adds a number from 0 to 7 to the register or memory location in the destination operand. This instruction occupies 16 bits, and the immediate data 0 to 7 is specified by 3 bits in the instruction word. For example, consider ADDQ. B #2, Dl. If [D1]1ow byte= 20 16, then, after execution of this ADDQ, the low byte of register Dl will contain 2216·
• All subtraction instructions subtract the source from the destination. For example, consider SUB. W D2, $1222 00. lf[D2]1owworct = 0003 16 and [12220016] = 0007 16, then, after execution of this SUB, memory location 12220016 will contain 000416•
Multiplication and Division Instructions
The 68000 instruction set includes both signed and unsigned multiplication of integer numbers.
Compare, Clear, and Negate Instructions
• The Compare (CMP) instruction subtracts source from destination providing no result of subtraction; all condition codes are affected based on the result. Note that the SUBTRACT instruction provides the result and also affects the Condition Codes. Consider CMP. B D3, DO . If prior to execution of the instruction, [DO.B] = $40 and [D3.B] = $30 then after execution of CMP. B D3, DO, the condition codes are as follows: C = 0, X= 0, Z = 0, N = 0, and V = 0. Suppose it is desired to find the number of matches for an 8-bit number in a 68000 register such as D5.B in a data array (stored from low to high memory) of 50 bytes in memory pointed to by AO. The following instruction sequence with CMP. B (AD)+, D5 rather than SUB. B (AD) +, D5 can be used:
In the above, if SUB. B (AO) +,OS were used instead of CMP. B (AO) +, DS, the number to be matched needs to be loaded after each subtraction because the contents of D5.B would have been lost after each SUB. Since we are only interested in the match rather than the result, CMP. B (AO) +, DS instead of SUB. B (AD)+, DS should be used in the above.
• The 68000 instruction set includes a memory to memory COMPARE instruction. Forexample, CMPM.W (AD)+, (Al)+.If[A0]=00100000 16,[A1]=00200000 16, [ 100000 16] = 0005 1"’ and [20000016] = 0006 16,then, after this CMPM instruction, N = 0, C = 0, X= 0, V = 0, Z = 0, [AO] = 00100002 16,and [AI]= 00200002 16•
• CLR. L DS clears all32 bits ofD5 to zero.
• Consider NEG. W (AD). If[AO] = 00200000 16 and [200000] = 510, then after this NEG instruction, the low I6 bits of location 200000 16 will contain FFFB 16•
Extended Arithmetic Instructions
• The ADDX and SUBX instruction can be used in performing multiprecision arithmetic because there are no ADDC (add with carry) or SUBC (subtract with borrow) instructions. For example, in order to perform a 64-bit addition, the following two instructions can be used:
Note that in this example, DIDO contain one 64-bit number and D6D5 contain the other 64-bit number. The 64-bit result is stored in D6D5.
• Consider EXT. W D2. If[D2]1owbyte = F3 16, then, after the EXT, [D2]1owword = FFF3 16•
• An example of sign extension is that, to multiply a signed 8-bit number by a signed 16-bit number, one must first sign-extend the signed 8-bit into a signed 16-bit number and then the instruction IMUL can be used for 16 x I6 signed multiplication. For unsigned multiplication of a 16-bit number by an 8-bit number, the 8-bit number must be zero extended to I6 bits using logical instruction such as AND before using the MUL instruction.
Test Instruction
Consider TST. W (AO). If [AO] = 00300000 16 and [30000016] = FFFF 16, then, after the TST. W (AD), the operation FFFF 16 – 0000 16 is performed internally by the 68000, Z is cleared to 0, and N is set to 1. The V and C flags are always cleared to 0.
Test and Set Instruction
TAS. B (EA) is usually used to synchronize two processors in multiprocessor data transfers. For example, consider the two 68000-based microcomputers with shared RAM as shown in Figure 10.5.
Suppose that it is desired to transfer the low byte of D0 from processor 1 to the low byte of D2 in processor 2. A memory location, namely, TRDATA, can be used to accomplish this. First, processor 1 can execute the TAS instruction to test the byte in the shared RAM with address TEST for zero value. If it is, processor 1 can be programmed to move the low byte of D0 into location TRDATA in the shared RAM. Processor 2 can then execute an instruction sequence to move the contents of TRDATA from the shared RAM into the low byte ofD2. The following instruction sequence will accomplish this:
Note that in these instruction sequences, TAS. B TEST checks the byte addressed by TEST for zero. If [TEST] = 0, then Z is set to 1; otherwise, Z = 0 and N = 1. After this, bit 7 of [TEST] is set to 1. Note that a zero value of [TEST] indicates that the shared RAM is free for use, and the Z bit indicates this after the TAS is executed. In each of the instruction sequences, after a data transfer using the MOVE instruction, [TEST] is cleared to zero so that the shared RAM is free for use by the other processor. To avoid testing the TEST byte simultaneously by two processors, the TAS is executed in a read-modify-write cycle. This means that once the operand is addressed by the 68000 executing the TAS, the system bus is not available to the other 68000 until the TAS is completed.