SUMMARY
1. The arithmetic coprocessor functions in parallel with the microprocessor. This means that the microprocessor and coprocessor can execute their respective instructions simultaneously.
2. The data types manipulated by the coprocessor include signed integer, floating-point, and binary-coded decimal (BCD).
3. Three forms of integers are used with the coprocessor: word (16 bits), short (32 bits), and long (64 bits). Each integer contains a signed number in true magnitude for positive numbers and two’s complement form for negative numbers.
4. A BCD number is stored as an 18-digit number in 10 bytes of memory. The most significant byte contains the sign-bit, and the remaining nine bytes contain an 18-digit packed BCD number.
5. The coprocessor supports three types of floating-point numbers: single-precision (32 bits), double-precision (64 bits), and temporary extended-precision (80 bits). A floating-point number has three parts: the sign, biased exponent, and significant. In the coprocessor, the exponent is biased with a constant and the integer bit of the normalized number is not stored in the significant, except in the temporary extended-precision form.
6. Decimal numbers are converted to floating-point numbers by (a) converting the number to binary, (b) normalizing the binary number, (c) adding the bias to the exponent, and (d) stor- ing the number in floating-point form.
7. Floating-point numbers are converted to decimal by (a) subtracting the bias from the expo- nent, (b) un-normalizing the number, and (c) converting it to decimal.
8. The 80287 uses I/O space for the execution of some of its instructions. This space is invisible to the program and is used internally by the 80286/80287 system. These 16-bit I/O addresses (00F8H–00FFH) must not be used for I/O data transfers in a system that contains an 80287. The 80387, 80486/7, and Pentium through Core2 use I/O addresses 800000F8H–800000FFH.
9. The coprocessor contains a status register that indicates busy, the conditions that follow a compare or test, the location of the top of the stack, and the state of the error bits. The FSTSW AX instruction, followed by SAHF, is often used with conditional jump instructions to test for some coprocessor conditions.
10. The control register of the coprocessor contains control bits that select infinity, rounding, precision, and error masks.
11. The following directives are often used with the coprocessor for storing data: DW (defineword), DD (define doubleword), DQ (define quadword), and DT (define 10 bytes).
12. The coprocessor uses a stack to transfer data between itself and the memory system. Generally, data are loaded to the top of the stack or removed from the top of the stack for storage.
13. All internal coprocessor data are always in the 80-bit extended-precision form. The only time that data are in any other form is when they are stored or loaded from the memory.
14. The coprocessor addressing modes include the classic stack mode, register, register with apop, and memory. Stack addressing is implied. The data at ST become the source, at ST(1) the destination, and the result is found in ST after a pop.
15. The coprocessor’s arithmetic operations include addition, subtraction, multiplication, divi- sion, and square root calculation.
16. There are transcendental functions in the coprocessor’s instruction set. These functions find the partial tangent or arctangent, 2X – 1, Y log2 X, and Y log2 (X + 1). The 80387, 80486/7,
and Pentium–Core2 also include sine and cosine functions.
17. Constants are stored inside the coprocessor that provide +0.0, +1.0, π, log2 10, log2 ε, log2 2, and logε 2.
18. The 80387 functions with the 80386 microprocessor and the 80487SX functions with the 80486SX microprocessor, but the 80486DX and Pentium–Core2 contain their own internal arithmetic coprocessor. The instructions performed by the earlier versions are available on these coprocessors. In addition to these instructions, the 80387, 80486/7, and Pentium–Core2 also can find the sine and cosine.
19. The Pentium Pro through Core2 contain two new floating-point instructions: FCMOV and FCOMI. The FCMOV instruction is a conditional move and the FCOMI performs the same task as FCOM, but it also places the floating-point flags into the system flag register.
20. The MMX extension uses the arithmetic coprocessor registers for MM0–MM7. Therefore, it is important that coprocessor software and MMX software do not try to use them at the same time.
21. The instructions for the MMX extensions perform arithmetic and logic operations on bytes (eight at a time), words (four at a time), doublewords (two at a time), and quadwords. The operations performed are addition, subtraction, multiplication, division, AND, OR, Exclusive-OR, and NAND.
22. Both the MMX unit and the SSE unit employ SIMD techniques to perform parallel opera- tions on multiple data with a single instruction. The SSE unit performs operations on inte- gers and floating-point numbers. The registers in the SSE unit are 128 bits in width and can hold (SSE 2 or newer) 16 bytes at a time or four single-precision floating-point numbers. The SSE unit contains registers XMM0–XMM7.
23. New applications written for the Pentium 4 should contain SSE instructions in place of
MMX instructions.
24. The OWORD pointer has been added to address 128-bit-wide numbers, which are referred to as octal words or double quadwords.