QUESTIONS AND PROBLEMS ON THE 80386 AND 80486 MICROPROCESSORS.

QUESTIONS AND PROBLEMS

1. The 80386 microprocessor addresses bytes of memory in the protected mode.

2. The 80386 microprocessor addresses bytes of virtual memory through the memory-management unit.

3. Describe the differences between the 80386DX and the 80386SX.

4. Draw the memory map of the 80386 when operated in the

(a) protected mode

(b) real mode

5. How much current is available on various 80386 output pin connections? Compare these currents with the currents available at the output pin connection of an 8086 microprocessor.

6. Describe the 80386 memory system, and explain the purpose and operation of the bank selection signals.

7. Explain the action of a hardware reset on the address bus connections of the 80386.

8. Explain how pipelining lengthens the access time for many memory references in the 80386 microprocessor-based system.

9. Briefly describe how the cache memory system functions.

10. I/O ports in the 80386 start at I/O address ____________ and extend to I/O address.

11. What I/O ports communicate data between the 80386 and its companion 80387 coprocessor?

12. Compare and contrast the memory and I/O connections found on the 80386 with those found in earlier microprocessors.

13. If the 80386 operates at 20 MHz, what clocking frequency is applied to the CLK2 pin?

14. What is the purpose of the BS16 pin on the 80386 microprocessor?

15. Define the purpose of each of the control registers (CR0, CR1, CR2, and CR3) found within the 80386.

16. Define the purpose of each 80386 debug register.

17. The debug registers cause which level of interrupt?

18. What are the test registers?

19. Select an instruction that copies control register 0 into EAX.

20. Describe the purpose of PE in CR0.

21. Form an instruction that accesses data in the FS segment at the location indirectly addressed by

the DI register. The instruction should store the contents of EAX into this memory location.

22. What is scaled index addressing?

23. Is the following instruction legal? MOV AX,[EBX+ECX]

24. Explain how the following instructions calculate the memory address:

(a) ADD [EBX+8*ECX],AL

(b) MOV DATA[EAX+EBX],CX

(c) SUB EAX,DATA

(d) MOV ECX,[EBX]

25. What is the purpose of interrupt type number 7?

26. Which interrupt vector type number is activated for a protection privilege violation?

27. What is a double interrupt fault?

28. If an interrupt occurs in the protected mode, what defines the interrupt vectors?

29. What is a descriptor?

30. What is a selector?

31. How does the selector choose the local descriptor table?

32. What register is used to address the global descriptor table?

33. How many global descriptors can be stored in the GDT?

34. Explain how the 80386 can address a virtual memory space of 64T bytes when the physical memory contains only 4G bytes of memory.

35. What is the difference between a segment descriptor and a system descriptor?

36. What is the task state segment (TSS)?

37. How is the TSS addressed?

38. Describe how the 80386 switches from the real mode to the protected mode.

39. Describe how the 80386 switches from the protected mode to the real mode.

40. What is virtual 8086 mode operation of the 80386 microprocessor?

41. How is the paging directory located by the 80386?

42. How many bytes are found in a page of memory?

43. Explain how linear memory address D0000000H can be assigned to physical memory address C0000000H with the paging unit of the 80386.

44. What are the differences between an 80386 and 80486 microprocessor?

45. What is the purpose of the FLUSH input pin on the 80486 microprocessor?

46. Compare the register set of the 80386 with the 80486 microprocessor.

47. What differences exist in the flags of the 80486 when compared to the 80386 microprocessor?

48. Which pins are used for parity checking on the 80486 microprocessor?

49. The 80486 microprocessor uses parity.

50. The cache inside the 80486 microprocessor is -K bytes.

51. A cache line is filled by reading -bytes from the memory system.

52. What is an 80486 burst?

53. Define the term cache write-through.

54. What is a BIST?

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