ANALOG-TO-DIGITAL (ADC) AND DIGITAL-TO-ANALOG (DAC) CONVERTERS
Analog-to-digital (ADC) and digital-to-analog (DAC) converters are used to interface the micro- processor to the analog world. Many events that are monitored and controlled by the micro- processor are analog events. These can range from monitoring all forms of events, even speech, to controlling motors and like devices. In order to interface the microprocessor to these events, we must have an understanding of the interface and control of the ADC and DAC, which convert between analog and digital data.
The DAC0830 Digital-to-Analog Converter
A fairly common and low-cost digital-to-analog converter is the DAC0830 (a product of National Semiconductor Corporation). This device is an 8-bit converter that transforms an 8-bit binary number into an analog voltage. Other converters are available that convert from 10-, 12-,
or 16-bit binary numbers into analog voltages. The number of voltage steps generated by the converter is equal to the number of binary input combinations. Therefore, an 8-bit converter generates 256 different voltage levels, a 10-bit converter generates 1024 levels, and so forth. The DAC0830 is a medium-speed converter that transforms a digital input to an analog output in approximately 1.0 μs.
Figure 11–48 illustrates the pin-out of the DAC0830. This device has a set of eight data bus connections for the application of the digital input code, and a pair of analog outputs labeled IOUT1 and IOUT2 that are designed as inputs to an external operational amplifier. Because this is an 8-bit converter, its output step voltage is defined as -VREF (reference voltage), divided by 255. For example, if the reference voltage is -5.0 V, its output step voltage is +.0196 V. Note that the output voltage is the opposite polarity of the reference voltage. If an input of 1001 00102 is applied to the device, the output voltage will be the step voltage times 1001 00102, or, in this case, +2.862 V. By changing the reference voltage to -5.1 V, the step voltage becomes +.02 V. The step voltage is also often called the resolution of the converter.
Internal Structure of the DAC0830. Figure 11–49 illustrates the internal structure of the DAC0830. Notice that this device contains two internal registers. The first is a holding register,
and the second connects to the R–2R internal ladder converter. The two latches allow one byte to be held while another is converted. In many cases, we disable the first latch and only use the second for entering data into the converter. This is accomplished by connecting a logic 1 to ILE and a logic 0 to CS (chip select).
Both latches within the DAC0830 are transparent latches. That is, when the G input to the latch is a logic 1, data pass through the latch, but when the G input becomes a logic 0, data are latched or held. The converter has a reference input pin (VREF) that establishes the full-scale output voltage. If -10 V is placed on VREF, the full-scale (111111112) output voltage is + 10 V. The output of the R–2R ladder within the converter appears at IOUT1 and IOUT2. These outputs are designed to be applied to an operational amplifier such as a 741 or similar device.
Connecting the DAC0830 to the Microprocessor. The DAC0830 is connected to the micro- processor as illustrated in Figure 11–50. Here, a PLD is used to decode the DAC0830 at 8-bit I/O port address 20H. Whenever an OUT 20H,AL instruction is executed, the contents of data bus connections AD0–AD7 are passed to the converter within the DAC0830. The 741 operational amplifier, along with the -12 V zener reference voltage, causes the full-scale output voltage to equal +12 V. The output of the operational amplifier feeds a driver that powers a 12 V DC motor. This driver is a Darlington amplifier for large motors. This example shows the converter driving a motor, but other devices could be used as outputs.
The ADC080X Analog-to-Digital Converter
A common, low-cost ADC is the ADC080X, which belongs to a family of converters that are all identical, except for accuracy. This device is compatible with a wide range of microprocessors such as the Intel family. Although there are faster ADCs available and some have more resolution than 8 bits, this device is ideal for many applications that do not require a high degree of accuracy. The ADC080X requires up to 100 μs to convert an analog input voltage into a digital output code.
Figure 11–51 shows the pin-out of the ADC0804 converter (a product of National Semiconductor Corporation). To operate the converter, the WR pin is pulsed with CS grounded to start the conversion process. Because this converter requires a considerable amount of time for the conversion, a pin labeled INTR signals the end of the conversion. Refer to Figure 11–52 for
a timing diagram that shows the interaction of the control signals. As can be seen, we start the converter with the WR pulse, we wait for INTR to return to a logic 0 level, and then we read the data from the converter. If a time delay is used that allows at least 100 μs of time, then we don’t need to test the INTR pin. Another option is to connect the INTR pin to an interrupt input, so that when the conversion is complete, an interrupt occurs.
The Analog Input Signal. Before the ADC0804 can be connected to the microprocessor, its analog inputs must be understood. There are two analog inputs to the ADC0804: VIN(+) and VIN(-). These inputs are connected to an internal operational amplifier and are differential inputs, as shown in Figure 11–53. The differential inputs are summed by the operational amplifier to
produce a signal for the internal analog-to-digital converter. Figure 11–53 shows a few ways to use these differential inputs. The first way (see Figure 11–53a) uses a single input that can vary between 0 V and +5.0 V. The second way (see Figure 11–53b) shows a variable voltage applied to the VIN(-) pin, so the zero reference for VIN(+) can be adjusted.
Generating the Clock Signal. The ADC0804 requires a clock source for operation. The clock can be an external clock applied to the CLK IN pin or it can be generated with an RC circuit. The permissible range of clock frequencies is between 100 KHz and 1460 KHz. It is desirable to use a frequency that is as close as possible to 1460 KHz, so conversion time is kept to a minimum.
If the clock is generated with an RC circuit, we use the CLK IN and CLK R pins connected to an RC circuit, as illustrated in Figure 11–54. When this connection is in use, the clock frequency is calculated by the following equation:
the ADC0804 to the Microprocessor. The ADC0804 is interfaced to the 8086 micro- processor, as illustrated in Figure 11–55. Note that the VREF signal is not attached to anything, which is normal. Suppose that the ADC0804 is decoded at 8-bit I/O port address 40H for the data and port address 42H for the INTR signal, and a procedure is required to start and read the data from the ADC. This procedure is listed in Example 11–29. Notice that the INTR bit is polled and if it becomes a logic 0, the procedure ends with AL, containing the converted digital code.
Using the ADC0804 and the DAC0830
This section of the text illustrates an example that uses both the ADC0804 and the DAC0830 to capture and replay audio signals or speech. In the past, we often used a speech synthesizer to generate speech, but the quality of the speech was poor. For human quality speech, we can use the ADC0804 to capture an audio signal and store it in memory for later playback through the DAC0830.
Figure 11–56 illustrates the circuitry required to connect the ADC0804 at I/O ports 0700H and 0702H. The DAC0830 is interfaced at I/O port 704H. These I/O ports are in the low bank of
a 16-bit microprocessor such as the 8086 or 80386SX. The software used to run these converters appears in Example 11–30. This software reads a 1-second burst of speech and then plays it back 10 times. One procedure reads the speech called READS and the other, called PLAYS, plays it back. The speech is sampled and stored in a section of memory called WORDS. The sample rate is chosen at 2048 samples per second, which renders acceptable-sounding speech.
