Digital Logic:The NAND Gate

The NAND Gate

The NAND gate is the “NOT AND” gate. Figure 50 – 21 shows the computer logic symbol and the NEMA logic symbol for the NAND gate. Notice that these symbols are the same as the symbols for the AND gate with inverted outputs. If any input of a NAND gate is low, the output is high. Refer to the truth table in Figure 50 – 22. Notice that the truth table clearly indicates that any zero input = a one output. Figure 50 – 23 shows an equivalent relay circuit for the NAND gate. If either relay A or relay B is de-energized, there is an out- put at Y.

The NAND gate is often referred to as the basic gate because it can be used to make any of the other gates. For instance, Figure 50 – 24 shows the NAND gate connected to make an INVERTER. If a NAND gate is used as an INVERTER and is connected to the output of another NAND gate, it will become an AND gate, as shown in Figure 50 – 25. When two NAND gates are connected as INVERTERS, and these INVERTERS are connected to the inputs of another NAND gate, an OR gate is formed (Figure 50 – 26). If an INVERTER is added to the output of the OR gate shown in Figure 50 – 26, a NOR gate is formed (Figure 50 – 27).

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