THE PENTIUM III
The Pentium III microprocessor is an improved version of the Pentium II microprocessor. Even though it is newer than the Pentium II, it is still based on the Pentium Pro architecture.
There are two versions of the Pentium III. One version is available with a nonblocking 512K-byte cache and packaged in the slot 1 cartridge, and the other version is available with a 256K-byte advanced transfer cache and packaged in an integrated circuit. The slot-1 version cache runs at half the processor speed, and the integrated-cache version runs at the processor clock frequency. As shown in most benchmarks of cache performance, increasing the cache size from 256K bytes to 512K bytes only improves performance by a few percent.
Chip Sets
The chip set for the Pentium III is different from the Pentium II. The Pentium III uses an Intel 810, 815, or 820 chip set. The 815 is most commonly found in newer systems that use the Pentium III. A few other vendors’ chip sets are available, but problems with drivers for new
peripherals, such as the video cards, have been reported. An 840 chip set also was developed for the Pentium III, but Intel did not make it available.
Bus
The Coppermine version of the Pentium III increases the bus speed to either 100 MHz or 133 MHz. The faster version allows transfers between the microprocessor and the memory at higher speeds. The last released version of the Pentium III was a 1 GHz microprocessor with a 133 MHz bus.
Suppose that you have a 1 GHz microprocessor that uses a 133 MHz memory bus. You might think that the memory bus speed could be faster to improve performance, and we agree. However, the connections between the microprocessor and the memory preclude using a higher speed for the memory. If we decided to use a 200 MHz bus speed, we must recognize that a wavelength at 200 MHz is 300,000,000/200,000,000 or 3/2 meter. An antenna is 1/4 of a wave- length. At 200 MHz, an antenna is 14.8 inches. We do not want to radiate energy at 200 MHz, so we need to keep the printed circuit board connections shorter than 1/4-wavelength. In practice, we would keep the connections to no more than 1/10 of 1/4-wavelength. This means that the connections in a 200 MHz system should be no longer than 1.48 inches. This size presents the main board manufacturer with a problem when placing the sockets for a 200 MHz memory system. A 200 MHz bus system may be the limit for the technology. If bus is tuned, there may be a way to go higher in frequency; only time will determine if it is possible. At present all that can be done is a play on words in advertisements such as 800M bytes per second to rate a bus. (Since 64 bits [8 bytes] are transferred at a time, 800M bytes per second is really 100 MHz.)
Will it be possible to exceed the 200 MHz memory system? Yes, if we develop a new technology for interconnecting the microprocessor, chip set, and memory. At present the memory functions in bursts of four 64-bit numbers each time we read the main memory. This burst of 32 bytes is read into the cache. The main memory requires three wait states at 100 MHz to access the first 64-bit number and then zero wait states for each of the three remaining 64-bit wide numbers for a total of seven 100 MHz bus clocks. This means we are reading data at 70 ns / 32 = 2.1875 ns per byte, which is a bus speed of 457M bytes per second. This is slower than the clock on a 1 GHz microprocessor, but because most programs are cyclic and the instructions are stored in an inter- nal cache, we can and often do approach the operating frequency of the microprocessor.
Pin-Out
Figure 19–4 shows the pin-out of the socket 370 version of the Pentium III microprocessor. This integrated circuit is packaged in a 370-pin, pin grid array (PGA) socket. It is designed to function with one of the chip sets available from Intel. In addition to the full version of the Pentium III, the Celeron, which uses a 66 MHz memory bus speed, is available. The Pentium III Xeon, also manufactured by Intel, allows larger cache sizes for server applications.