Hardware timeout
Context
● You are developing an embedded application using one or more members of the 8051 family of microcontrollers.
● The application has a time-triggered architecture, constructed using a scheduler.
Problem
How do you produce well-defined timeout behaviour so that, for example, you can respond within exactly 0.5 ms if an expected event does not occur?
Background
See LOOP TIMEOUT [page 298] for relevant background material.
Solution
As we saw in HARDW ARE DELA Y [page 194], we can create portable and easy to use delay code for the 8051 family as follows:
HARDW ARE TIMEOUT involves a simple variation on this technique and allows precise timeout delays to be easily generated.
For example, in LOOP TIMEOUT [page 298] we considered the process of reading from an ADC in a Philips 8XC552 microcontroller.
This was the original, potentially dangerous, code:
Hardware resource implications
HARDW ARE TIMEOUT requires the use of a timer.
Reliability and safety implications
HARDW ARE TIMEOUT is the most reliable form of timeout structure we consider in the book.
Portability
Like all timer-based patterns, this code may be easily ported to other members of the 8051 family. It may also be ported to other microcontrollers.
Overall strengths and weaknesses
ccurate timeout delays may be obtained using HARDW ARE TIMEOUT .
The number of timers available is very limited: however, when using a co- operative scheduler, the tasks are running co-operatively and the same timer may be used in several tasks at the same time.
Related patterns and alternative solutions
See LOOP TIMEOUT [page 298] for an alternative that does not require the use of any timer hardware.
In addition, HARDW ARE W A TCHDOG [page 217] provides an alternative; however, it is rather crude by comparison and detects errors at the application (rather than task) level.
Example: Testing hardware timeouts
Listing 15.4 illustrates the delays obtained with some hardware timeouts using the Keil hardware simulator (see also Figure 15.3).