Hardware Testing
A hardware implementation can be tested using a dual-beam scope as indicated above. The correct function of the closed loop control process can be tested by setting the binary input to B‘10100000’ and checking the actual speed of the motor by measuring the period of the sensor pulse, which should be 100 ms. The binary input can then be varied, and the sensor period should vary in proportion, within limits stated above. The transient and start-up response can be examined by stalling the motor (if not too powerful), and studying the motor response as it locks on to the target speed. When the dummy load is switched in, the drive should compensate and maintain the speed of the motor by increasing the drive PWM MSR.
Evaluation and Improvements
The output was found to be slightly unstable around the target value, owing to the unequal timing of the alternative routes through the program, but this may not be significant in a real motor where the load inertia will tend to maintain a constant speed. Ideally, the PWM speed control should operate at a frequency above about 15 kHz. The demonstration program CLS2 operates at a lower frequency, because of the time required to sample the timer status and sensor input, and to complete the software loop for one drive cycle, which only uses an 8-bit count counter, Timer0. The performance will be improved by operating at the maximum MCU clock speed of 20 MHz, using interrupts and the hardware PWM output associated with 16-bit Timer2. Timer1 is a 16-bit counter, which would provide greater range and/or precision in the speed measurement. The Timer1 interrupt could be incorporated into signal timeout. Alternatively, the sensor pulse could be detected as a change at port A interrupt.