Pin Coniguration
Descriptions of the various pins are given below.
RST
This is the reset input. This input should normally be at logic 0. A reset is accomplished by holding the RST pin high for at least two machine cycles. Power-on reset is normally performed by connecting an external capacitor and a resistor to this pin (see Figs 1.3 and 1.4).
P3.0
This is a bi-directional I/O pin (bit 0 of port 3) with an internal pull-up resistor. This pin alsoacts as the data receive input (RXD) when the device is used as an asynchronous UART to receive serial data.
P3.7
This is a bi-directional I/O pin (bit 1 of port 3) with an internal pull-up resistor. This pin also acts as the data transmit output (TXD) on the 8051 when the device is used as an asynchronous UART to transmit serial data.
XTAL7 and XTAL2
These pins are where an external crystal should be connected for the operation of the internal oscillator. Normally two 33 pF capacitors are connected with the crystal as shown in Figs 1.3 and 1.4. A machine cycle is obtained by dividing the crystal frequency by 12. Thus, with a 12 MHz crystal, the machine cycle is 1 fls. Most machine instructions execute in one machine cycle.
P3.2
This is a bi-directional I/O pin (bit 2 of port 3) with an internal pull-up resistor. This pin is alsothe external interrupt 0 (INT0) pin.
P3.3
This is a bi-directional I/O pin (bit 3 of port 3) with an internal pull-up resistor. This pin is alsothe external interrupt 1 (INT1) pin.
P3.4
This is a bi-directional I/O pin (bit 4 of port 3) with an internal pull-up resistor. This pin is alsothe counter 0 input (T0) pin.
P3.5
This is a bi-directional I/O pin (bit 5 of port 3) with an internal pull-up resistor. This pin is alsothe counter 1 input (T1) pin.
GND
Ground pin.
P3.6
This is a bi-directional I/O pin. This pin is not available on the AT89C2051. It is alsothe external memory write (WR) pin.
P3.7
This is a bi-directional I/O pin for bit 7 of port 3. On the standard 8051, this pin is alsothe external data memory read (RD) pin.
P7.0
This is a bi-directional I/O pin for bit 0 of port 1. This pin has no internal pull- up resistors on the 20-pin devices. It is also used as the positive input of the analogue comparator (AIN0) on the 20-pin device.
P7.7
This is a bi-directional I/O pin for bit 1 of port 1. This pin has no internal pull- up resistors on the 20-pin devices. It is also used as the positive input of the analogue comparator (AIN1) on the 20-pin device.
P7.2 to P7.7
These are the remaining bi-directional I/O pins of port 1. These pins have internal pull-up resistors.
vee
Supply voltage.
P0.0 to P0.7
These are the eight I/O pins of port 0 of the standard 8051. These pins have no pull-up resistors. P0.0 to P0.7 are also used to provide the low addresses (A0 to A7) and the data during fetches from external program memory and during accesses toexternal data memory.
P2.0 to P2.7
These are the eight I/O pins of port 2 of the standard 8051. These pins have pull-up resistors. P2.0 toP2.7 are alsoused toprovide the high address (A8 to A15) byte during fetches from external program memory and during accesses toexternal data memory.
EA/vPP
This is the external access enable pin on the standard 8051. EA should be connected to VCC for internal program executions. This pin also receives the programming voltage during programming.
PSEN
This is the program store enable pin on the 8051 devices. This pin is activated when the device is executing code from external memory.
ALE/PROG
This is the address latch enable pin on the standard 8051 devices. This pin is used to latch the low byte of the address during accesses to external memory.