Harvard Architecture
In conventional processor systems, the instruction codes and associated operands have to be transferred from memory using the same address and data bus as the system data, that is, the data read in via inputs or generated by the processor. The PIC architecture has separate paths for the instructions and the system data. Therefore, the instruction fetch operation can be carried out at the same time as the results from the previous operation are stored. As a result, the program executes more quickly at the same clock speed, by carrying out two processes concurrently. The instruction fetch and execute cycles overlap to double the execution rate (pipelining; see Chapter 5).
RISC Instruction Set
The PIC has a relatively small number of instructions compared with a conventional complex instruction set computing (CISC) processor. This has two main benefits: the instruction set is easier to learn and the code executes more quickly, because the instruction decoding hardware is less complicated. The downside is that more complex operations may have to be constructed from simpler ones, ending up taking longer to execute. Overall, the reduced instruction set computing (RISC) performance is usually superior because, in a typical application, these complex instructions are not needed too often. The PIC 16 chip typically has 35 instructions, while the 18 series MCUs have up to 85, so the more powerful devices need more instructions for extra performance.
Flash Program Memory
The introduction of flash memory was a key stage in the development of microcontrollers. Writable, but non-volatile, memory is essential in embedded systems to store the control program. Previously, erasable programmable read-only memory (EPROM) was used, but this had to be removed from the system for erasing under ultraviolet light before reprogramming. Battery-backed random access memory (RAM) was an alternative, but battery life is limited. In-circuit serial programming allows flash ROM to be reprogrammed without the inconvenience, time-wasting and possible damage caused by having to remove it from the circuit each time. Program memory capacity ranges from 256 instructions in the smallest 10F chip to 128k in the larger 18F MCUs. The program counter range varies accordingly.
RAM and Special Function Registers
The individual bits in the special function registers (SFRs) need to be read and written when initializing the chip or during program operation. Because they are located in the same RAM block as the general purpose registers (GPRs), they can be accessed using the same instructions. This means that special instructions for control register access are not needed, which helps to keep the instruction set small. RAM size varies from 16 bytes to over 2k bytes, with the number of SFRs also increasing with the chip complexity and the number of peripheral interfaces.