Hardware resource implications
All the examples here require the use of a scheduler. The main resource implication is that, to update (say) four digits, you need a scheduler with a tick interval of around 5 ms. This is not usually a limiting factor. Overall, the LED update code will consume only around 1% of the CPU time in a typical application, since – although frequent – it is a simple and fast operation.
The memory requirements are minimal.
A substantial number of port pins are required.
Reliability and safety implications
LEDs are not visible in bright light and, as such, must be used with care if they are displaying safety-related information.
For multiplexed displays, you must ensure that the application (or scheduler) cannot become locked: if it does, the display will very quickly be destroyed by high current values. Thus, if a poorly designed task blocks the scheduler, even for a few seconds, and delays a display update (usually scheduled around 20 to 50 Hz), you will probably destroy the display. Whatever happens, you need to ensure that such an event will not impact on the general operation of the microcontroller and, therefore, completely destroy the application.
Portability
These techniques are easily ported across members of the 8051 family and to any other processor family. No features unique to the 8051 are employed.
Overall strengths and weaknesses
Multi-segment LED displays are reliable and cheap.
The techniques discussed in this pattern are easy to apply and highly portable.
A typical interface requires a substantial number of port pins: up to 12 pins for a multiplexed 4-digit display.
Displays are not visible in bright sunlight. Provide an additional audible warning if necessary.
Multiplexed displays can suffer from reliability problems if the scheduling is not handled correctly.
Related patterns and alternative solutions
There are numerous ‘intelligent’ LED drivers, such as the Maxim 7219, that can deal with the task of driving and multiplexing LED displays for you. These usually have a serial interface and, as a result, require few port pins. This can be a useful solution if port availability is limited.
Another way of reducing port requirements is to use a version of the 74×247, BCD- to-7-segment decoder IC as an interface to your displays, as illustrated in Figure 21.7. The main problem with this approach is that the 74×247 is no longer widely avail- able. If you can find a good supply and are assured of future supplies, this device is easy to use: consult the data sheet for details.
Another alternative, if lack of ports is a problem, is to use an additional Small 8051 in your design. This chip will then be responsible for the display multiplexing and updates: data can be easily transferred to such a device using a serial interface and a shared-clock scheduler (Figure 21.8). Shared-clock schedulers are discussed in Part F.
