REAL-TIME OPERATING SYSTEMS (RTOS)
This section of the text describes the real-time operating system (RTOS). Interrupts are used to develop RTOSs because they are used in embedded applications of the microprocessor. All systems, from the simplest embedded application the most sophisticated system, must have an operating system.
What Is a Real-Time Operating System (RTOS)?
The RTOS is an operating system used in embedded applications that performs tasks in a predictable amount of time. Operating systems, like Windows, defer many tasks and do not guarantee their execution in a predictable time. The RTOS is much like any other operating system in that it contains the same basic sections. Figure 16–26 illustrates the basic structure of an operating system as it might be placed on an EPROM or flash memory device.
There are three components to all operating systems: (1) initialization, (2) the kernel, (3) data and procedures. If Example 16–5 (last section) is compared to the Figure 16–26, all three sections will be seen. The initialization section is used to program all hardware components in the system, load drivers specific to a system, and program the contents of the microprocessor’s registers. The kernel performs the basic system task, provides system calls or functions, and comprises the embedded system. The data and procedure section holds all procedures and any static data used by the operating system.
The RESET Section. The last part of the software in Example 16–5 shows the reset block of the RTOS. The ORG statement places the reset instructions at a location that is 16 bytes from the end of the memory device. In this case the EPROM is 32K bytes, which means it begins at 0000H and ends at 7FFFH. Recall that a 32K device has 15 address pins. The CS input selects the EPROM for location F8000H through FFFFFH in the system. The ORG statement in the pro- gram places the origin of the reset section at location 80F0H because all tiny model (.COM) pro- grams are assembled from offset address 100H even though the first byte of the program is the first byte stored in the file. Because of this bias, all the addresses on the EPROM must be adjusted by 100H as is the ORG statement.
Only 16 bytes of memory exist for the reset instruction because the reset location is FFFF0H in the system. In this example there is only enough room to program the UCS starting address as F8000H before a jump to the start of the EPROM. Far jumps are not allowed in the tiny model, so it was forced by storing the actual hexadecimal opcode for a far jump (EAH).
Initialization Section. The initialization section of Example 16–5 begins in the reset block and continues at the start of the EPROM. If the initialization section is viewed, all of the programma- ble devices in the system are programmed and the segment registers are loaded. The initialization section also programs timer 2 so it causes an interrupt to the TIM2 procedure each millisecond. The TIM2 interrupt service procedure updates the clock once per second and is also the basis of precision time delays in the software.
The Kernel. The kernel in Example 16–5 is very short, because the system is incomplete and serves only as a test system. In this example all that the system does is display a sign-on message and display the time of day on the second line of the LCD. Once this is accomplished, the system ends at an infinite WHILE loop. All system programs are infinite loops unless they crash.
An Example System
Figure 16–27 illustrates a simple embedded system based on the 80188EB embedded micro- processor. This schematic depicts only the parts added to Figure 16–25 in order to read a temper- ature from the LM-70. This system contains a 2-line × 16 character-per-line LCD display that shows the time of day and the temperature. The system itself is stored on a small 32K × 8 EPROM. A 32K × 8 SRAM is included to act as a stack and store the time. A database holds the most recent temperatures and the times at which the temperatures were obtained.
The temperature sensor is located inside the LM70 digital temperature sensor manufactured by National Semiconductor Corporation for less than $1.00. The interface to the microprocessor is in serial format, and the converter has a resolution of 10 bits plus a sign bit. Figure 16–28 illustrates the pin-out of the LM70 temperature sensor.
The LM70 transfers data to and from the microprocessor through the SIO pin, which is a bidirectional serial data pin. Information is clocked through the SIO pin by the SC (clock) pin. The LM70 contains three 16-bit registers: the configuration register, the temperature sensor register, and the identification register. The configuration register selects either the shutdown mode (XXFFH) or continuous conversion mode (XX00). The temperature register contains the signed temperature in the leftmost 11 bits of the 16-bit data word. If the temperature is negative, it is in their respective complement forms. The identification register presents an 8100 when it is read.
When the temperature is read from the LM70, it is read in Celsius and each step is equal to 0.25°C. For example, if the temperature register is 0000 1100 100X XXXX or a value of 100 decimal, the temperature is 25.0°C.
Example 16–6 illustrates the software added to the operating system listed in Example 16–5. The system samples the temperatures once per minute and stores them in a circular queue along with the day and the time in hours and minutes. The day is a number that starts at zero when the system is initialized. The size of the queue has been set to 16K bytes, so the most recent 4,096 measurements can be stored. In this example the keyboard is not used, but some of the system calls are used to display the temperature on line 1 of the display. The real-time clock is also interrogated to determine the start of each minute so a sample can occur. The software in the listing replaces the software section in Example 16–5 where it states, “;System software placed here”. This software replaces the infinite WHILE loop in the example.
The LM70 is initialized by output 16 bits of 0s to it and then read by reading all 16 bits of the temperature. The reading of the LM70 is accomplished in the software by the TEMP procedure and initialization is by the INITT procedure.
A Threaded System
At times an operating system is needed that can process multiple threads. Multiple threads are handled by the kernel using a real-time clock interrupt. One method for scheduling processes in a small RTOS is to use a time slice to switch between various processes. The basic time slice can be any duration and is somewhat dependent on the execution speed of the microprocessor. For example, in a system using a 100 MHz clock, many instructions will execute in one or two clocks on a modem microprocessor. Assuming the machine executes one instruction every two clocks and a time slice of 1 ms is chosen, the machine can execute about 50,000 instructions one time slice, which should be adequate for most systems. If a lower clock frequency is employed, then a time slice of 10 ms or even 100 ms is selected.
Each time slice is activated by a timer interrupt. The interrupt service procedure must look to the queue to determine if a task is available to execute, and if it is, it must start execution of the new task. If no new task is present, it must continue executing old tasks or enter an idle state and wait for a new task to be queued. The queue is circular and may contain any number of tasks for the system up to some finite limit. For example, it might be a small queue in a small system with 10 entries. The size is determined by the intended overall system needs and could be made larger or smaller.
Each scheduling queue entry must contain a pointer to the process (CS:IP) and the entire context state of the machine. Scheduling queue entries may also contain some form of a time-to- live entry in case of a deadlock, a priority entry, and an entry that can lengthen the slice activation time. In the following example, a priority entry or an entry to lengthen the amount of consecutive time slices allowed a program will not be used. The kernel will service processes strictly on a linear basis or on a round-robin fashion as they come from the queue.
To implement a scheduler for the embedded system, procedures, or macros, are implemented to start a new application, kill an application when it completes, and pause an application if it needs time to access I/O. Each of these macros accesses a scheduling queue located in the memory system at an available address such as 0500H. The scheduling queue uses the data structure in Example 16–7 to make creating the queue fairly easy, and it will have room for 10 entries. This scheduling queue allows us to start up to 10 processes at a time.
The data structure of Example 16–7 is copied into memory 10 times to complete the queue structure during system initialization; hence, it contains no active process at initialization. We also need a queue pointer initialized to 500H. The queue pointer is stored at location 4FEH in this example. Example 16–8 provides one possible initialization. This stores the data structure in the RAM with 10 copies beginning at 500H. This software assumes that a system clock of 32 MHz operates timer 2 used as a prescalar to divide the clock input (system clock divided by 8) of 4 MHz by 40,000. This causes the output of timer 2 to be 1 KHz (1.0 ms). Timer 1 is programmed to divide the timer 2 clock signal by 10 to generate an interrupt every 10 ms.
The NEW procedure (installed at INT 60H in Example 16–9) adds a process to the queue. It searches through the 10 entries until it finds a zero in the first byte (PRESENT), which indicates
that the entry is empty. If it finds an empty entry, it places the starting address of the process into RCS and RIP and a 0200H into the RFLAG location. A 200H in RFLAG makes sure that the interrupt is enabled when the process begins, which prevents the system from crashing. The NEW procedure waits, if 10 processes are already scheduled, until a process ends. Each process is also assigned stack space in 256-byte sections beginning at offset address 7600H, so the lowest process has stack space 7500H–75FFH, the next has stack space 7600H–76FFH, and so on. The assignment of a stack area could be allocated by a memory manager algorithm.
The PAUSE procedure is merely a call to the time slice procedure (INT 12H) that bails out of the process and returns control to the time slice procedure, prematurely ending the time slice for the process. This early out allows other processes to continue before returning to the current process.
The time slice interrupt service procedure for an 80188EB using a 10 ms time slice appears in Example 16–11. Because this is an interrupt service procedure, care has been taken to make it as efficient as possible. Example 16–11 illustrates the time slice procedure located at interrupt vector 12H for operation with timer 1 in the 80188EB microprocessor. Although not shown, this software assumes that timer 2 is used as a prescalar and timer 1 uses the signal from timer 2 to generate the 10 ms interrupt. The software also assumes that no other interrupt is in use in the system.
