SUMMARY
1. The 80186/80188 microprocessors contain the same basic instruction set as the 8086/8088 microprocessors, except that a few additional instructions are added. The 80186/80188 are thus enhanced versions of the 8086/8088 microprocessors. The new instructions include PUSHA, POPA, INS, OUTS, BOUND, ENTER, LEAVE, and immediate multiplication and shift/rotate counts.
2. Hardware enhancements to the 80186/80188 include a clock generator, a programmable interrupt controller, three programmable timers, a programmable DMA controller, a programmable chip selection logic unit, a watchdog timer, a dynamic RAM refresh logic circuit, and additional features on various versions.
3. The clock generator allows the 80186/80188 to operate from an external TTL-level clock source, or from a crystal attached to the X1 (CLKIN) and X2 (OSCOUT) pins. The frequency
of the crystal is twice the operating frequency of the microprocessor. The 80186/80188
microprocessors are available in speeds of 6 to 20 MHz.
4. The programmable interrupt controller arbitrates all internal and external interrupt requests.
It is also capable of operating with two external 8259A interrupt controllers.
5. Three programmable timers are located within the 80186/80188. Each timer is a fully programmable, 16-bit counter used to generate wave-forms or count events. Two of the timers, timers 0 and 1, have external inputs and outputs. The third timer, timer 2, is clocked from the system clock and is used either to provide a clock for another timer or to request a DMA action.
6. The programmable DMA controller is a fully programmable, two-channel controller. DMA transfers are made between memory and I/O, I/O and I/O, or between memory locations. DMA requests occur from software, hardware, or the output of timer 2.
7. The programmable chip selection unit is an internal decoder that provides up to 13 output pins to select memory (6 pins) and I/O (7 pins). It also inserts 0 to 3 wait states, with or with-
out external READY synchronization. On the EB and EC versions, the number of waits can be programmed from 0 to 15 and 10 chip selection pins.
8. The only difference between the timing of the 80186/80188 and the 8086/8088 is that ALE appears one-half clock pulse earlier. Otherwise, the timing is identical.
9. The 6 MHz version of the 80186/80188 allows 417 ns of access time for the memory; the 8 MHz version allows 309 ns of access time.
10. The interna180186/80188 peripherals are programmed via a peripheral control block (PCB), initialized at I/O ports FF00H–FFFFH. The PCB may be moved to any area of memory or I/O by changing the contents of the PCB relocation register at initial I/O location FFFEH and FFFFH.
11. The 80286 is an 8086 that has been enhanced to include a memory-management unit (MMU). The 80286 is capable of addressing a 16M-byte physical memory space because of the management unit.
12. The 80286 contains the same instructions as the 80186/80188, except for a handful of additional instructions that control the memory-management unit.
13. Through the memory-management unit, the 80286 microprocessor addresses a virtual memory space of 1G bytes, as specified by the 16K descriptors stored in two descriptor tables.