SUMMARY
1. Data movement instructions transfer data between registers, a register and memory, a register and the stack, memory and the stack, the accumulator and I/O, and the flags and the stack. Memory-to-memory transfers are allowed only with the MOVS instruction.
2. Data movement instructions include MOV, PUSH, POP, XCHG, XLAT, IN, OUT, LEA, LOS, LES, LSS, LGS, LFS, LAHF, SAHF, and the following string instructions: LODS, STOS, MOVS, INS, and OUTS.
3. The first byte of an instruction contains the opcode. The opcode specifies the operation per- formed by the microprocessor. The opcode may be preceded by one or more override pre- fixes in some forms of instructions.
4. The D-bit, located in many instructions, selects the direction of data flow. If D = 0, the data flow from the REG field to the R/M field of the instruction. If D = 1, the data flow from the R/M field to the REG field.
5. The W-bit, found in most instructions, selects the size of the data transfer. If W = 0, the data are byte-sized; if W = 1, the data are word-sized. In the 80386 and above, W = 1 specifies either a word or doubleword register.
6. MOD selects the addressing mode of operation for a machine language instruction’s R /M field. If MOD = 00, there is no displacement; if MOD = 01, an 8-bit sign-extended dis- placement appears; if MOD = 10, a 16-bit displacement occurs; and if MOD = 11, a regis- ter is used instead of a memory location. In the 80386 and above, the MOD bits also specify a 32-bit displacement.
7. A 3-bit binary register code specifies the REG and R/M fields when the MOD = 11. The 8- bit registers are AH, AL, BH, BL, CH, CL, DH, and DL. The l6-bit registers are AX, BX, CX, DX, SP, BP, DI, and SI. The 32-bit registers are EAX, EBX, ECX, EDX, ESP, EBP, EDI, and ESI. To access the 64-bit registers, a new prefix is added called the REX prefix that contains a fourth bit for accessing registers R8 through R15.
8. When the R/M field depicts a memory mode, a 3-bit code selects one of the following modes: 3BX + DI4, 3BX + SI4, 3BP + DI4, 3BP+ SI4, [BX], [BP], [DI], or [SI] for 16-bit instructions. In the 80386 and above, the R/M field specifies EAX, EBX, ECX, EDX, EBP, EDI, and ESI or one of the scaled-index modes of addressing memory data. If the scaled- index mode is selected 1R>M = 1002, an additional byte (scaled-index byte) is added to the instruction to specify the base register, index register, and the scaling factor.
9. By default, all memory-addressing modes address data in the data segment unless BP or EBP addresses memory. The BP or EBP register addresses data in the stack segment.
10. The segment registers are addressed only by the MOV, PUSH, or POP instructions. The instruction may transfer a segment register to a 16-bit register, or vice versa. MOV CS,reg or POP CS instructions are not allowed because they change only a portion of the address. The 80386 through the Pentium 4 include two additional segment registers, FS and GS.
11. Data are transferred between a register or a memory location and the stack by the PUSH and POP instructions. Variations of these instructions allow immediate data to be pushed onto the stack, the flags to be transferred between the stack, and all 16-bit registers can be transferred between the stack and the registers. When data are transferred to the stack, 2 bytes (8086–80286) always move. The most significant byte is placed at the location addressed by SP – 1, and the least significant byte is placed at the location addressed by SP – 2. After placing the data on the stack, SP is decremented by 2. In the 80386–Core2, 4 bytes of data from a memory location or register may also be transferred to the stack.
12. Opcodes that transfer data between the stack and the flags are PUSHF and POPF. Opcodes that transfer all the 16-bit registers between the stack and the registers are PUSHA and POPA. In the 80386 and above, PUSHFD and POPFD transfer the contents of the EFLAGS between the microprocessor and the stack, and PUSHAD and POPAD transfer all the 32-bit registers. The PUSHA and POPA instructions are invalid in the 64-bit mode.
13. LEA, LDS, and LES instructions load a register or registers with an effective address. The LEA instruction loads any 16-bit register with an effective address; LDS and LES load any 16- bit register and either DS or ES with the effective address. In the 80386 and above, additional instructions include LFS, LGS, and LSS, which load a 16-bit register and FS, GS, or SS.
14. String data transfer instructions use either or both DI and SI to address memory. The DI off- set address is located in the extra segment, and the SI offset address is located in the data segment. If the 80386–Core2 is operated in protected mode, ESI and EDI are used with the string instructions.
15. The direction flag (D) chooses the auto-increment or auto-decrement mode of operation for DI and SI for string instructions. To clear D to 0, use the CLD instruction to select the auto- increment mode; to set D to 1, use the STD instruction to select the auto-decrement mode. Either or both DI and SI increment/decrement by 1 for a byte operation, by 2 for a word operation, and by 4 for a doubleword operation.
16. LODS loads AL, AX, or EAX with data from the memory location addressed by SI; STOS stores AL, AX, or EAX in the memory location addressed by DI; and MOVS transfers a byte, a word, or a doubleword from the memory location addressed by SI into the location addressed by DI.
17. INS inputs data from an I/O device addressed by DX and stores it in the memory location addressed by DI. The OUTS instruction outputs the contents of the memory location addressed by SI and sends it to the I/O device addressed by DX.
18. The REP prefix may be attached to any string instruction to repeat it. The REP prefix repeats the string instruction the number of times found in register CX.
19. Arithmetic and logic operators can be used in assembly language. An example is MOV AX,34*3, which loads AX with 102.
20. Translate (XLAT) converts the data in AL into a number stored at the memory location addressed by BX plus AL.
21. IN and OUT transfer data between AL, AX, or EAX and an external I/O device. The address of the I/O device is either stored with the instruction (fixed-port addressing) or in register DX (variable-port addressing).
22. The Pentium Pro–Core2 contain a new instruction called CMOV, or conditional move. This instruction only performs the move if the condition is true.
23. The segment override prefix selects a different segment register for a memory location than the default segment. For example, the MOV AX,[BX] instruction uses the data segment, but the MOV AX,ES:[BX] instruction uses the extra segment because of the ES: override prefix. Using the segment override prefix is the only way to address the FS and GS segments in the 80386 through the Pentium 4.
24. The MOVZX (move and zero-extend) and MOVSX (move and sign-extend) instructions, found in the 80386 and above, increase the size of a byte to a word or a word to a double- word. The zero-extend version increases the size of the number by inserting leading zeros. The sign-extend version increases the size of the number by copying the sign-bit into the more significant bits of the number.
25. Assembler directives DB (define byte), DW (define word), DD (define doubleword), and DUP (duplicate) store data in the memory system.
26. The EQU (equate) directive allows data or labels to be equated to labels.
27. The SEGMENT directive identifies the start of a memory segment and ENDS identifies the end of a segment when full-segment definitions are in use.
28. The ASSUME directive tells the assembler what segment names you have assigned to CS, DS, ES, and SS when full-segment definitions are in effect. In the 80386 and above, ASSUME also indicates the segment name for FS and GS.
29. The PROC and ENDP directives indicate the start and end of a procedure. The USES direc- tive (MASM version 6.x) automatically saves and restores any number of registers on the stack if they appear with the PROC directive.
30. The assembler assumes that software is being developed for the 8086/8088 microprocessor unless the .286, .386, .486, .586, or .686 directive is used to select one of these other micro- processors. This directive follows the .MODEL statement to use the 16-bit instruction mode and precedes it for the 32-bit instruction mode.
31. Memory models can be used to shorten the program slightly, but they can cause problems for larger programs. Also be aware that memory models are not compatible with all assembler programs.