QUESTIONS AND PROBLEMS
1. What are program-visible registers?
2. The 80286 addresses registers that are 8 and bits wide.
3. The extended registers are addressable by which microprocessors?
4. The extended BX register is addressed as .
5. Which register holds a count for some instructions?
6. What is the purpose of the IP/EIP register?
7. The carry flag bit is not modified by which arithmetic operations?
8. Will an overflow occur if a signed FFH is added to a signed 01H?
9. A number that contains 3 one bits is said to have parity.
10. Which flag bit controls the INTR pin on the microprocessor?
11. Which microprocessors contain an FS segment register?
12. What is the purpose of a segment register in the real mode operation of the microprocessor?
13. In the real mode, show the starting and ending addresses of each segment located by the following segment register values:
(a) 1000H
(b) 1234H
(c) 2300H
(d) E000H
(e) AB00H
14. Find the memory address of the next instruction executed by the microprocessor, when oper- ated in the real mode, for the following CS:IP combinations:
(a) CS = 1000H and IP = 2000H
(b) CS = 2000H and IP = 1000H
(c) CS = 2300H and IP = 1A00H
(d) CS = 1A00H and IP = B000H
(e) CS = 3456H and IP = ABCDH
15. Real mode memory addresses allow access to memory below which memory address?
16. Which register or registers are used as an offset address for the string instruction destination in the microprocessor?
17. Which 32-bit register or registers are used to hold an offset address for data segment data in the Pentium 4 microprocessor?
18. The stack memory is addressed by a combination of the _________ segment plus offset.
19. If the base pointer (BP) addresses memory, the segment contains the data.
20. Determine the memory location addressed by the following real mode 80286 register combinations:
(a)DS = 1000H and DI = 2000H
(b) DS = 2000H and SI = 1002H
(c)SS = 2300H and BP = 3200H
(d) DS = A000H and BX = 1000H
(e)SS = 2900H and SP = 3A00H
21. Determine the memory location addressed by the following real mode Core2 register combinations:
(a)DS = 2000H and EAX = 00003000H
(b) DS = 1A00H and ECX = 00002000H
(c)DS = C000H and ESI = 0000A000H
(d) SS = 8000H and ESP = 00009000H
(e)DS = 1239H and EDX = 0000A900H
22. Protected mode memory addressing allows access to which area of the memory in the 80286 microprocessor?
23. Protected mode memory addressing allows access to which area of the memory in the Pentium 4 microprocessor?
24. What is the purpose of the segment register in protected mode memory addressing?
25. How many descriptors are accessible in the global descriptor table in the protected mode?
26. For an 80286 descriptor that contains a base address of A00000H and a limit of 1000H, what starting and ending locations are addressed by this descriptor?
27. For a Core2 descriptor that contains a base address of 01000000H, a limit of 0FFFFH, and G = 0, what starting and ending locations are addressed by this descriptor?
28. For a Core2 descriptor that contains a base address of 00280000H, a limit of 00010H, and G = 1, what starting and ending locations are addressed by this descriptor?
29. If the DS register contains 0020H in a protected mode system, which global descriptor table entry is accessed?
30. If DS = 0103H in a protected mode system, the requested privilege level is .
31. If DS = 0105H in a protected mode system, which entry, table, and requested privilege level are selected?
32. What is the maximum length of the global descriptor table in the Pentium 4 microprocessor?
33. Code a descriptor that describes a memory segment that begins at location 210000H and ends at location 21001FH. This memory segment is a code segment that can be read. The descriptor is for an 80286 microprocessor.
34. Code a descriptor that describes a memory segment that begins at location 03000000H and ends at location 05FFFFFFH. This memory segment is a data segment that grows upward in the memory system and can be written. The descriptor is for a Pentium 4 microprocessor.
35. Which register locates the global descriptor table?
36. How is the local descriptor table addressed in the memory system?
37. Describe what happens when a new number is loaded into a segment register when the microprocessor is operated in the protected mode.
38. What are the program-invisible registers?
39. What is the purpose of the GDTR?
40. How many bytes are found in a memory page?
41. What register is used to enable the paging mechanism in the 80386, 80486, Pentium, Pentium Pro, Pentium 4, and Core2 microprocessors?
42. How many 32-bit addresses are stored in the page directory?
43. Each entry in the page directory translates how much linear memory into physical memory?
44. If the microprocessor sends linear address 00200000H to the paging mechanism, which paging directory entry is accessed, and which page table entry is accessed?
45. What value is placed in the page table to redirect linear address 20000000H to physical address 30000000H?
46. What is the purpose of the TLB located within the Pentium class microprocessor?
47. Using the Internet, write a short report that details the TLB. Hint: You might want to go to the Intel Web site and search for information.
48. Locate articles about paging on the Internet and write a report detailing how paging is used in a variety of systems.
49. What is the flat mode memory system?
50. A flat mode memory system in the current version of the 64-bit Pentium 4 and Core2 allow these microprocessors to access bytes of memory.